Embodiments relate to a semiconductor device. Embodiments also relate to a capacitor device that may have a high capacitance, a semiconductor device having the same, and a method for manufacturing the semiconductor device.
Merged memory logic (MML) is a device in which a memory cell array, for example, dynamic random access memory (DRAM), and an analog circuit or peripheral circuits may be integrated with each other in a single chip. With the development of such merged memory logic, various functions may be significantly improved. In addition, a more highly integrated and faster semiconductor device may be attained.
The analog circuit in the MML may include a capacitor, for example, a metal-insulator-metal (“MIM”) capacitor that may operate at high speed. Such a MIM capacitor should have small resistivity and no parasitic capacitance.
A related art MIM capacitor may be made by sequentially forming a titanium Ti layer, a titanium nitride TiN layer, a first metal layer, a dielectric layer, a second metal layer, and a photo resist layer on a semiconductor substrate including conductive layer. The second metal layer, the dielectric layer, the first metal layer, the titanium nitride TiN layer, and the titanium Ti layer may be sequentially patterned using the photo resist layer as a mask.
A MIM capacitor should have a high capacitance. The capacitance of a MIM capacitor may be proportional to a dielectric constant and a facing area of the first and second metal layers, but may be inversely proportional to a distance between the first and second metal layers.
Accordingly, the higher the dielectric constant is, the greater a facing area is. Additionally, the shorter a distance is between the metal layers, the greater the capacitance of the MIM capacitor.
However, since a MIM capacitor may be made by sequentially forming the first metal layer, the dielectric layer, and the second metal layer on a plane, there is an upper limit to the capacitance of the MIM capacitor.
Moreover, because a higher degree of integration is desirable, a reduced size of a MIM capacitor would be beneficial. However, there is a limit as to how small the MIM capacitor can be made according to related art.